AXI Multi-Channel SPI controller with DMA Capability


Introduction

Green Electrons Multi-Channel SPI controller allows the user to easily have up to 16 independent Master or Slave SPI interfaces.

The IP is capable of performing DMA to DRAM memory to fetch the data which should be sent over any of SPI interfaces or to put the data received from any of SPI interface in the memory.

The CPU can configure the IP and then stand aside completely while the Multi-Channel SPI controller is operating.

Multi-Chanel SPI controller can also be configured at the time of instantiation in the design. The IP becomes fully operational the soonest FPGA comes up and without any need for any configuration from CPU.


Synplified symbolic representation

The following Figure shows a symbolic representation of the IP.


symplified symbolic representation of axi multi-channel dma-capable spi ip