Designing with AXI DMA and using AXI DMA under Linux


This Practical Educational Package describes how to use AMD (Xilinx) AXI DMA IP in FPGA designs and how to develop your own software for it. The operation of AXI DMA is explained in detail and various example designs are provided.


The package shows you how to develop your own Linux kernel level driver for AXI DMA. It also shows you how you can create Linux user level applications to talk to driver, to receive data and process it at CPU side, or to transfer your data to your on FPGA modules. Provided examples (hardware and related software code) show data transfer between hardware (on FPGA modules) and software in both directions.


This package is available as recorded videos and source codes. In-Person training through online meetings is also possible, where you can ask or start any discussion you like during the training and you can change the focus of training towards the topics that are more interesting for you and are used in your projects.


The package mainly targets Xilinx ZYNQ and ZYNQ Ultrascale+ devices. It however can be used for any Xilinx FPGA device.


 

Key facts and contents


  • Package is based on Vivado 2020.2 and Petalinux 2020.2.

  • Package contains 38+ videos that describe both the hardware and software, design creation and compile flow completely.

  • Package teaches you how to use the AXI DMA IP while running Linux on your ZYNQ PS ARM Host. How to manage and allocate memory, how to instruct the DMA to do data transfers.

  • Both S2MM and MM2S data transfers are covered. Different design scenarios are covered. Designs with multiple DMA engines running at the same time, or multiple AXI streams being served using one AXI DMA concurrently are covered.

  • Complete Vivado designs, scripts and software source codes are included.

  • Package teaches you how to write a kernel level driver. It contains 6 kernel level drivers for 6 different pieces of hardware. Using them you can learn the development of kernel level drivers from very basic level to more advanced levels where one single driver is responsible for managing several AXI DMA (or other peripheral) blocks at the same time.

  • Package comes with the following pieces of IP included : AXI stream counter, AXI sample generator, AXI search and replace, AXI multi-channel scheduler (basic version)

  • Package teaches you how to manage data transfers from PS to PL and vice versa using AXI DMA. It teaches you to do so for any amount of data that you may need to transfer for any number of times that you may need to do the transfers.

  • Package gives you insight on the structure of kernel level drivers, device tree and Petalinux folder structure for development

  • All examples are available for both of the zynq and zynq ultrascale+ targets. Scripts for the following boards are included: ZED, MicroZED, ZCU102, ZCU104, ZCU106.

  • Package contains support for any questions you might have. You will have support and help with any questions you might have related to AXI DMA through out your learning and project.


 

List of videos in the package


Here is the list and description of videos available in the package:


  • axi-dma-linux-part-01-intro: introduction to the package and AXI DMA IP

  • axi-dma-linux-part-02-package-description: Overview on package content

  • axi-dma-linux-part-03-axi-dma-ip: Further description of AXI DMA IP.

  • axi-dma-linux-part-04-simplest-vivado-project: Example vivado project using AXI DMA IP.

  • axi-dma-linux-part-05-simplest-vivado-project-cont: Continue with design example

  • axi-dma-linux-part-06-xsa-file-and-creating-petalinux-project: Exporting Vivado design to creating Petalinux project

  • axi-dma-linux-part-07-creating-boot-bin-file-and-its-content: Description of BOOT.BIN file

  • axi-dma-linux-part-08-customizing-linux-kernel-and-root-file-sys: Customizing Linux kernel and rootfs in Petalinux for our tests

  • axi-dma-linux-part-09-generated-device-tree: Inspecting the generated devicetree from our hardware by Petalinux

  • axi-dma-linux-part-10-how-device-tree-works: Furhter description of devicetree

  • axi-dma-linux-part-11-customizing-device-tree: Customizing devicetree for our purpose

  • axi-dma-linux-part-12-user-level-and-kernel-level: User level applications vs. Kernel level drivers

  • axi-dma-linux-part-13-folders-structure: Folders structure of our Petalinux project

  • axi-dma-linux-part-14-vivado-project: Further description of complete Vivado project

  • axi-dma-linux-part-15-axi-dma-multiple-clocks: Using AXI DMA with multiple clock domains

  • axi-dma-linux-part-16-interfacing-to-ADC: Discussing ADC interface connections to AXI DMA

  • axi-dma-linux-part-17-sample-generator-ip: Further description of sample generator IP used in the design

  • axi-dma-linux-part-18-sample-generator-driver: Our Linux kernel level driver for sample generator IP

  • axi-dma-linux-part-19-packaging-axi-dma-ip: Creating a wrapper and a packaged IP out of AXI DMA

  • axi-dma-linux-part-20-kernel-driver-reg-mode-interrupt: Studying AXI DMA Linux kernel level driver (accessing registers and managing interrupts)

  • axi-dma-linux-part-21-kernel-driver-mem-allocation: Studying memory allocation in our Linux kernel level driver for AXI DMA

  • axi-dma-linux-part-22-user-level-app: Studying the user level application for communication with our AXI DMA Linux kernel level driver

  • axi-dma-linux-part-23-symbolic-links-for-headers: More description about symbolic links and sharing header files between driver and user level application

  • axi-dma-multiple-streams-01-introduction: Introduction to design idea of using one AXI DMA for transferring multiple streams

  • axi-dma-multiple-streams-02-folder-structure: Folder structure for AXI DMA with multiple streams package

  • axi-dma-multiple-streams-03-vivado-design: Example Vivado design for transferring multiple streams with one AXI DMA

  • axi-dma-multiple-streams-04-axi-stream-counter: Description of AXI stream counter IP used in example design

  • axi-dma-multiple-streams-05-mcdma-scheduler: Description of basic version of AXI multi-channel DMA scheduler IP

  • axi-dma-multiple-streams-06-kernel-driver-for-axi-stream-counter: Linux kernel level driver for AXI stream counter IP

  • axi-dma-multiple-streams-07-kernel-driver-mcdma-scheduler: Linux kernel level driver for basic version of multi-channel DMA scheduler IP

  • axi-dma-multiple-streams-08-A-axi-dma-kernel-level-driver-memory-layout-description: AXI DMA Linux kernel level driver, description of memory layout

  • axi-dma-multiple-streams-08-B-axi-dma-kernel-level-driver-ioctl: AXI DMA Linux kernel level driver, description of implemented IO controls

  • axi-dma-multiple-streams-08-C-axi-dma-kernel-level-driver-c-code-and-mmap: AXI DMA Linux kernel level driver, implementation of mmap fuction

  • axi-dma-multiple-streams-08-D-axi-dma-kernel-level-driver-isr-and-ioctl: AXI DMA Linux kernel level driver, more about interrupt service routine implementation and IO controls

  • axi-dma-multiple-streams-09-A-user-level-app-initialization-of-drivers: User level application, openning connections to kernel level drivers

  • axi-dma-multiple-streams-09-B-user-level-app-main-transfer-loop: User level application, implementation of the main data transfer loop

  • axi-dma-multiple-streams-10-A-on-board-tests-building-the-design: On-board tests of AXI DMA and multiple stream transfers design

  • axi-dma-multiple-streams-10-B-running-on-board-test: Further description and on-board tests

 

Here is the introduction video of this package. (Watch on youtube)



 

Note: If you are interested in using AXI DMA in Scatter-Gather mode, please look at AXI Multi-Channel DMA package.

 

Support

Might you purchase any of the packages, whenever you have any doubts or questions during your learning, you can write us an email and Green-electrons makes sure your question is answered as soon as possible.

 

Pricing

Index Package content Price (euros)
1 AXI DMA Vivado design examples along with Linux kernel level drivers and user level applications. Videos describing the complete hardware and software. Including details on drivers. 190
2 Complete item 1 (mentioned above) plus design examples representing transfer of multiple concurrent streams of data using one AXI DMA. Vivado design, related RTL source and descriptive videos are included. 290
3 Complete items 1 and 2 plus design examples representing using AXI DMA along with data transfer over network. Examples contain Vivado design and Linux software. 390
4 Complete items 1, 2 and 3 plus AXI Multi-channel DMA with Scatter-gather data transfer package. AXI MCDMA with SG package is described here. 690
 

If you are a student then there exists a 10% discount on the above prices for you.

 

Licensing

The license of the package asks the customer (individual, company or research lab) to pay attention that the entire provided content is for customer's own personal educational use only.

 

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