AI On FPGAs
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Running PyTorch AI Suite on Zynq Ultrascale+ (libtorch application interface)
Easy-to-use package providing all you need to run your PyTorch C++ application on Zynq Ultrascale+
AXI Interfaces
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Educational package, containing example designs, hardware and software source code, videos and support.
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Package, containing timed AXI DMA IP along with example designs, hardware and software source code, videos and support.
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AXI Multi-Channel DMA (with Scatter-Gather data transfer) and using it under Linux
Educational package, containing example designs, hardware and software source code, videos and support.
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Educational package ZYNQ and ZYNQ Ultrascale+ devices, containing example designs, hardware and software source code, videos and also support.
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Designing with AXI Video DMA IP
Educational package for AMD Video DMA IP, containing example designs, hardware and software source code, videos and also support.
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An AXI stream FIFO which uses DRAM memory (MIG or PS side DRAM) as its memory instead of FPGA block memories, allowing to realize FIFOs with very large depth.
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Easy to use IP for transferring data between on FPGA block memories and any (PL side or PS side...) DRAM memory.
PCIe Interfaces
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Easy to learn content allowing you to create your own FPGA design with a working PCI Express link to PC.
Network Interfaces
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An easy-to-use RGMII to AXI stream bridge for any FPGA device that has a RGMII Gigabit Ethernet PHY connected to its programmable fabric.
Audio CODEC Interfaces
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FPGA Interfacing to AD1937, AD1938 and AD1939 Audio CODECs
Low-area footprint FPGA interface IP for Analog devices multi-channel audio CODECs with full control through integrated I2C interface
Analog to Digital Converters (ADC) Interfaces
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FPGA Interfacing to AD7616 ADC (in software mode)
Low-area footprint, FPGA IP for interfacing to AD7616 device with dual-spi connection in software mode with full control over all device configurations.
Digital to Analog Converters (DAC) Interfaces
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FPGA Interfacing to DAC61402 and DAC81402 Digital to Analog convrters.
Low cost FPGA IP for interfacing to DACx1402 DAC enabling the full features of the chip.
SPI Interfaces
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AXI multi-channel DMA-capable SPI controller
An AXI SPI controller which supports up to 16 SPI (each Master or Slave) channels concurrently. It contains a DMA engine for direct access to memory.
I2C Interfaces
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AXI multi-channel DMA-capable I2C controller
An AXI IIC controller which supports up to 16 IIC (each Master or Slave) channels concurrently. It contains a DMA engine for direct access to memory.